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MICRF002/RF022
Micrel
MICRF002/RF022
300-440MHz QwikRadioTMASK Receiver Final Information
General Description
The MICRF002 is a single chip ASK/OOK (ON-OFF Keyed) RF receiver IC. This device is a true "antenna-in to data-out" monolithic device. All RF and IF tuning is accomplished automatically within the IC which eliminates manual tuning and reduces production costs. The result is a highly reliable yet low cost solution. The MICRF002 is a fully featured part in 16-pin packaging, the MICRF022 is the same part packaged in 8-pin packaging with a reduced feature set (see "Ordering Information" for more information). The MICRF002 is an enhanced version of the MICRF001 and MICRF011. The MICRF002 provides two additional functions over the MICRF001/011, (1) a Shutdown pin, which may be used to turn the device off for duty-cycled operation, and (2) a "Wake-up" output, which provides an output flag indicating when an RF signal is present. These features make the MICRF002 ideal for low and ultra-low power applications, such as RKE and remote controls. All IF filtering and post-detection (demodulator) data filtering is provided within the MICRF002, so no external filters are necessary. One of four demodulator filter bandwidths may be selected externally by the user. The MICRF002 offer two modes of operation; fixed-mode (FIX) and sweep-mode (SWP). In fixed mode the MICRF002 functions as a conventional superhet receiver. In sweep mode the MICRF002 employs a patented sweeping function to sweep a wider RF spectrum. Fixed-mode provides better selectivity and sensitivity performance and sweep mode enables the MICRF002 to be used with low cost, imprecise transmitters.
QwikRadioTM
Features
* 300MHz to 440MHz frequency range * Data-rate up to 10kbps (fixed-mode) * Low Power Consumption * 2.2mA fully operational (315MHz) * 0.9A in shutdown * 220A in polled operation (10:1 duty-cycle) * Wake-up output flag to enable decoders and microprocessors * Very low RF reradiation at the antenna * Highly integrated with extremely low external part count
Applications
* * * * Automotive Remote Keyless Entry (RKE) Remote controls Remote fan and light control Garage door and gate openers
Typical Application
1/4 Wave Monopole
MICRF002 SEL0 SEL0 SWEN REFOSC SEL1 CAGC WAKEB SHUT DO VSSBB Data Output 4.7uF 4.8970MHz
12pF
68nH +5V
VSSRF VSSRF ANT VDDRF VDDBB CTH
12nH
0.047uF
NC
315MHz 800bps On-Off Keyed Receiver
QwikRadio is a trademark of Micrel, Inc. The QwikRadio ICs were developed under a partnership agreement with AIT of Orlando, Florida. Micrel, Inc. * 1849 Fortune Drive * San Jose, CA 95131 * USA * tel + 1 (408) 944-0800 * fax + 1 (408) 944-0970 * http://www.micrel.com
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MICRF002/RF022
MICRF002/RF022
Micrel
Ordering Information
Part Number MICRF002BM MICRF022BM-SW48 MICRF022BM-FS12 MICRF022BM-FS24 MICRF022BM-FS48 Demodulator Bandwidth User Programable 5000Hz 1250Hz 2500Hz 5000Hz Operating Mode Fixed or Sweep Sweep Fixed Fixed Fixed Shutdown Yes No Yes Yes Yes WAKEB Output Flag Yes Yes No No No Package 16-Pin SOP 8-Pin SOP 8-Pin SOP 8-Pin SOP 8-Pin SOP
Pin Configuration
MICRF002Bx SEL0 1 SEL0 VSSRF 2 VSSRF 3 ANT 4 VDDRF 5 VDDBB 6 CTH 7 NC 8 16 SWEN 15 REFOSC 14 SEL1 13 CAGC 12 WAKEB 11 SHUT 10 DO 9 VSSBB VSSRF 1 ANT 2 VDDRF 3 CTH 4 MICRF022Bx-xxxx 8 7 6 5 REFOSC CAGC SHUT/WAKEB DO
Standard 16-Pin or 8-Pin SOP (M) Packages
8-Pin Options
The standard 16-pin package allows complete control of all configurable features. Some reduced function 8-pin versions are also available, see "Ordering Information" above. For high-volume applications additional customized 8-pin devices can be produced. SWEN, SEL0 and SEL1 pins are internally bonded to reduce the pin count. pin 6 may be configured as either SHUT or WAKEB.
SEL0 1 0 1 0
SEL1 1 1 0 0
Demodulator Bandwidth Sweep Mode 5000Hz 2500Hz 1250Hz 625Hz FIXED Mode 10000Hz 5000Hz 2500Hz 1250Hz
Table 1. Nominal Demodulator Filter Bandwidth vs. SEL0, SEL1 and Operating Mode
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Pin Description
Pin Number 16-Pin Pkg. 1 Pin Number 8-Pin Pkg. Pin Name SEL0 Pin Function Bandwidth Selection Bit 0 (Digital Input): Used in conjunction with SEL1 to set the desired demodulator filter bandwidth. See Table 1. Internally pulledup to VDDRF RF Power Supply: Ground return to the RF section power supply. Antenna (Analog Input): For optimal performance the ANT pin should be impedance matched to the antenna. See "Applications Information" for information on input impedance and matching techniques RF Power Supply: Positive supply input for the RF section of the IC Base-Band Power Supply: Positive supply input for the baseband section (digital section) of the IC Data Slicing Threshold Capacitor (Analog I/O): Capacitor connected to this pin extracts the dc average value from the demodulated waveform which becomes the reference for the internal data slicing comparator Not internally connected Base-Band Power Supply: Ground return to the baseband section power supply Data Output (Digital Output) Shutdown (Digital Input): Shutdown-mode logic-level control input. Pull low to enable the receiver. Internally pulled-up to VDDRF Wakeup (Digital Output): Active-low output that indicates detection of an incoming RF signal Automatic Gain Control (Analog I/O): Connect an external capacitor to set the attack/decay rate of the on-chip automatic gain control Bandwidth Selection Bit 1 (Digital Input): Used in conjunction with SEL0 to set the desired demodulator filter bandwidth. See Table 1. Internally pulledup to VDDRF Reference Oscillator: Timing reference, sets the RF receive frequency. Sweep-Mode Enable (Digital Input): Sweep- or Fixed-mode operation control input. SWEN high= sweep mode; SWEN low = conventional superheterodyne receiver. Internally pulled-up to VDDRF
2, 3 4
1 2
VSSRF ANT
5 6 7
3
VDDRF VDDBB
4
CTH
8 9 10 11 12 13 14 7 5 6
NC VSSBB DO SHUT WAKEB CAGC SEL1
15 16
8
REFOSC SWEN
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MICRF002/RF022
MICRF002/RF022
Micrel
Absolute Maximum Ratings (Note 1)
Supply Voltage (VDDRF, VDDBB) .................................... +7V Input/Output Voltage (VI/O) ................. VSS-0.3 to VDD+0.3 Junction Temperature (TJ) ...................................... +150C Storage Temperature Range (TS) ............ -65C to +150C Lead Temperature (soldering, 10 sec.) ................... +260C ESD Rating, Note 3
Operating Ratings (Note 2)
Supply Voltage (VDDRF, VDDBB) ................ +4.75V to +5.5V RF Frequency Range ............................. 300MHz to 440Hz Data Duty-Cycle ............................................... 20% to 80% Reference Oscillator Input Range ............ 0.1VPP to 1.5VPP Ambient Temperature (TA) ......................... -40C to +85C
Electrical Characteristics
VDDRF = VDDBB = VDD where +4.75V VDD 5.5V, VSS = 0V; CAGC = 4.7F, CTH = 100nF; SEL0 = SEL1 = VSS; fixed mode ( SWEN = VSS); fREFOSC = 4.8970MHz (equivalent to fRF = 315MHz); data-rate = 1kbps (Manchester encoded). TA = 25C, bold values indicate -40C TA +85C; current flow into device pins is positive; unless noted. Symbol IOP Parameter Operating Current Condition continuous operation, fRF = 315MHz polled with 10:1 duty cycle, fRF = 315MHz continuous operation, fRF = 433.92MHz polled with 10:1 duty cycle, fRF = 433.92MHz ISTBY Standby Current VSHUT = VDD fRF = 315MHz fRF = 433.92MHz fIF fBW IF Center Frequency IF Bandwidth Maximum Receiver Input Spurious Reverse Isolation AGC Attack to Decay Ratio AGC Leakage Current Note 6 Note 6 RSC = 50 ANT pin, RSC = 50, Note 5 tATTACK / tDECAY TA = +85C RF Section, IF Section Receiver Sensitivity (Note 4) -97 -95 0.86 0.43 -20 30 0.1 100 nA dBm dBm MHz MHz dBm Vrms Min Typ 2.2 220 3.5 350 0.9 Max 3.2 Units mA A mA A A
Reference Oscillator ZREFOSC Reference Oscillator Input Impedance Reference Oscillator Source Current Note 8 290 5.2 k uA
Demodulator ZCTH IZCTH(leak) CTH Source Impedance CTH Leakage Current Demodulator Filter Bandwidth Sweep Mode (SWEN = VDD or OPEN) Note 6 Demodulator Filter Bandwidth Fixed Mode (SWEN = VSS Note 6 Note 7 TA = +85C VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 = VDD = VDD = VSS = VSS = VDD = VDD = VSS = VSS 145 100 4000 2000 1000 500 8000 4000 2000 1000 k nA Hz Hz Hz Hz Hz Hz Hz Hz
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Symbol Parameter Condition Min Typ Max
Micrel
Units
Digital/Control Section VIN(high) VIN(low) IOUT VOUT(high) VOUT(low) tR, tF
Note 1. Note 2. Note 3. Note 4: Note 5: Note 6:
Input-High Voltage Input-Low Voltage Output Current Output High Voltage Output Low Voltage Output Rise and Fall Times
SEL0, SEL1, SWEN SEL0, SEL1, SWEN DO, WAKEB pins, push-pull DO, WAKEB pins, IOUT = -1A DO, WAKEB pins, IOUT = +1A DO, WAKEB pins, CLOAD = 15pF 10 0.9 0.2 10
0.8
VDD VDD A VDD
0.1
VDD s
Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. Devices are ESD sensitive, use appropriate ESD precautions. Meets class 1 ESD test requirements, (human body model HBM), in accordance with MIL-STD-883C, method 3015. Do not operate or store near strong electrostatic fields. Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The RF input is assumed to be matched to 50. Spurious reverse isolation represents the spurious components which appear on the RF input pin (ANT) measured into 50 with an input RF matching network. Parameter scales linearly with reference oscillator frequency fT. For any reference oscillator frequency other than 4.8970MHz, compute new parameter value as the ratio:
fREFOSCMHz x (parameter value at 4.8970MHz) 4.8970MHz
Note 7: Parameter scales inversely with reference oscillator frequency fT. For any reference oscillator frequency other than 4.8970MHz, compute new parameter value as the ratio:
4.8970MHz x (parameter value at 4.8970MHz) fREFOSCMHz
Note 8:
Series resistance of the resonator (ceramic resonator or crystal) should be minimized to the extent possible. In cases where the resonator series resistance is too great, the oscillator may oscillate at a diminished peak-to-peak level, or may fail to oscillate entirely. Micrel recommends that series resistances for ceramic resonators and crystals not exceed 50Ohms and 100Ohms respectively. Refer to Application Hint 35 for crystal recommendations.
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MICRF002/RF022
MICRF002/RF022
Micrel
Typical Characteristics
Supply Current vs. Frequency
6.0 TA = 25C VDD = 5V
CURRENT (mA)
3.5
Supply Current vs. Temperature
f = 315MHz VDD = 5V
4.5
CURRENT (mA)
3.0
2.5
3.0 Sweep Mode, Continuous Operation 1.5 250 300 350 400 450 500
2.0 Sweep Mode, Continuous Operation 1.5 -40 -20 0 20 40 60 80 100
FREQUENCY (MHz)
TEMPERATURE (C)
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Functional Diagram
CAGC CAGC ANT RF Amp f RX fIF IF Amp 430kHz
5th Order Band-Pass Filter
AGC Control
2nd Order Programmable Low-Pass Filter
SwitchedCapacitor Resistor Comparator DO
IF Amp
Peak Detector RSC
fLO VDD VSS Programmable Synthesizer
CTH
UHF Downconverter
OOK Demodulator
CTH
SEL0 SEL1 SWEN SHUT fT REFOSC Cystal or Ceramic MICRF002 Resonator Reference Oscillator Control Logic Resettable Counter WAKEB
Reference and Control
Wakeup
Figure 1. MICRF002 Block Diagram
Applications Information and Functional Description
Refer to figure 1 "MICRF002 Block Diagram". Identified in the block diagram are the four sections of the IC: UHF Downconverter, OOK Demodulator, Reference and Control, and Wakeup. Also shown in the figure are two capacitors (CTH, CAGC) and one timing component, usually a crystal or ceramic resonator. With the exception of a supply decoupling capacitor, and antenna impedance matching network, these are the only external components needed by the MICRF002 to assemble a complete UHF receiver. For optimal performance is highly recommended that the MICRF002 is impedance matched to the antenna, the matching network will add an additional two or three components. Four control inputs are shown in the block diagram: SEL0, SEL1, SWEN, and SHUT. Using these logic inputs, the user can control the operating mode and selectable features of the IC. These inputs are CMOS compatible, and are internally pulled-up. IF Bandpass Filter Roll-off response of the IF Filter is 5th order, while the demodulator data filter exhibits a 2nd order response.
Step 1: Selecting The Operating Mode
Fixed-Mode Operation For applications where the transmit frequency is accurately set (that is, applications where a SAW or crystal-based transmitter is used) the MICRF002 may be configured as a standard superheterodyne receiver (fixed mode). In fixedmode operation the RF bandwidth is narrower making the receiver less susceptible to interfering signals. Fixed mode is selected by connecting SWEN to ground. Sweep-Mode Operation When used in conjunction with low-cost L-C transmitters the MICRF002 should be configured in sweep-mode. In sweepmode, while the topology is still superheterodyne, the LO (local oscillator) is swept over a range of frequencies at rates greater than the data rate. This technique effectively increases the RF bandwidth of the MICRF002, allowing the device to operate in applications where significant transmitter-receiver frequency misalignment may exist. The transmit frequency may vary up to 0.5% over initial tolerance, aging, and temperature. In sweep-mode a band approximately 1.5% around the nominal transmit frequency is captured. The transmitter may drift up to 0.5% without the need to retune the receiver and without impacting system performance. The swept-LO technique does not affect the IF bandwidth, therefore noise performance is not degraded relative to fixed mode. The IF bandwidth is 430kHz whether the device is operating in fixed or sweep-mode. Due to limitations imposed by the LO sweeping process, the upper limit on data rate in sweep mode is approximately 5.0kbps. Similar performance is not currently available with crystalbased superheterodyne receivers which can operate only with SAW- or crystal-based transmitters.
Design Steps
The following steps are the basic design steps for using the MICRF002 receiver: 1). Select the operating mode (sweep or fixed) 2). Select the reference oscillator 3). Select the CTH capacitor 4). Select the CAGC capacitor 5). Select the demodulator filter bandwidth
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MICRF002/RF022
In sweep-mode, a range reduction will occur in installations where there is a strong interferer in the swept RF band. This is because the process indiscriminately includes all signals within the sweep range. An MICRF002 may be used in place of a superregenerative receiver in most applications.
Micrel
Frequency fT is in MHz. Connect a crystal of frequency fT to REFOSC on the MICRF002. Four-decimal-place accuracy on the frequency is generally adequate. The following table identifies fT for some common transmit frequencies when the MICRF002 is operated in fixed mode.
Transmit Frequency fTX 315MHz 390MHz 418MHz 433.92MHz Reference Oscillator Frequency fT 4.8970MHz 6.0630MHz 6.4983MHz 6.7458MHz
Step 2: Selecting The Reference Oscillator
All timing and tuning operations on the MICRF002 are derived from the internal Colpitts reference oscillator. Timing and tuning is controlled through the REFOSC pin in one of three ways: 1. Connect a ceramic resonator 2. Connect a crystal 3. Drive this pin with an external timing signal The specific reference frequency required is related to the system transmit frequency and to the operating mode of the receiver as set by the SWEN pin. Crystal or Ceramic Resonator Selection Do not use resonators with integral capacitors since capacitors are included in the IC, also care should be taken to ensure low ESR capacitors are selected. Application Hint 34 and Application Hint 35 provide additional information and recommended sources for crystals and resonators. If operating in fixed-mode, a crystal is recommended. In sweep-mode either a crystal or ceramic resonator may be used. When a crystal of ceramic resonator is used the minimum voltage is 300mVPP. If using an externally applied signal it should be AC-coupled and limited to the operating range of 0.1VPP to 1.5VPP. Selecting Reference Oscillator Frequency fT (Fixed Mode) As with any superheterodyne receiver, the mixing between the internal LO (local oscillator) frequency fLO and the incoming transmit frequency fTX ideally must equal the IF center frequency. Equation 1 may be used to compute the appropriate fLO for a given fTX: (1)
Table 2. Fixed Mode Recommended Reference Oscillator Values For Typical Transmit Frequencies (high-side mixing) Selecting REFOSC Frequency fT (Sweep Mode) Selection of the reference oscillator frequency fT in sweep mode is much simpler than in fixed mode due to the LO sweeping process. Also, accuracy requirements of the frequency reference component are significantly relaxed. In sweep mode, fT is given by Equation 3: (3)
64.25 In SWEEP mode a reference oscillator with frequency accurate to two-decimal-places is generally adequate. A crystal may be used and may be necessary in some cases if the transmit frequency is particularly imprecise.
Transmit Frequency fTX 315MHz 390MHz 418MHz 433.92MHz Reference Oscillator Frequency fT 4.88MHz 6.05MHz 6.48MHz 6.73MHz
fT =
fLO
fLO = fTX
f 0.86 TX 315
Table 3. Recommended Reference Oscillator Values For Typical Transmit Frequencies (sweep-mode)
Frequencies fTX and fLO are in MHz. Note that two values of fLO exist for any given fTX, distinguished as "high-side mixing" and "low-side mixing." High-side mixing results in an image frequency above the frequency of interest and low-side mixing results in a frequency below. After choosing one of the two acceptable values of fLO, use Equation 2 to compute the reference oscillator frequency fT: (2)
f fT = LO 64.5
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Micrel Selecting CAGC Capacitor in Continuous Mode A CAGC capacitor in the range of 0.47F to 4.7F is typically recommended. The value of the CAGC should be selected to minimize the ripple on the AGC control voltage by using a sufficiently large capacitor. However if the capacitor is too large the AGC may react too slowly to incoming signals. AGC settling time from a completely discharged (zero-volt) state is given approximately by Equation 6:
(6)
t = 1.333C AGC - 0.44
Step 3: Selecting The CTH Capacitor
Extraction of the dc value of the demodulated signal for purposes of logic-level data slicing is accomplished using the external threshold capacitor CTH and the on-chip switchedcapacitor "resistor" RSC, shown in the block diagram. Slicing level time constant values vary somewhat with decoder type, data pattern, and data rate, but typically values range from 5ms to 50ms. Optimization of the value of CTH is required to maximize range. Selecting Capacitor CTH The first step in the process is selection of a data-slicing-level time constant. This selection is strongly dependent on system issues including system decode response time and data code structure (that is, existence of data preamble, etc.). This issue is covered in more detail in Application Note 22. The effective resistance of RSC is listed in the electrical characteristics table as 145k at 315MHz, this value scales linearly with frequency. Source impedance of the CTH pin at other frequencies is given by equation (4), where fT is in MHz: (4)
RSC = 145k
4.8970 fT
of 5x the bit-rate is recommended. Assuming that a slicing level time constant has been established, capacitor CTH may be computed using equation (5)
C TH =
RSC
where: CAGC is in F, and t is in seconds. Selecting CAGC Capacitor in Duty-Cycle Mode Voltage droop across the CAGC capacitor during shutdown should be replenished as quickly as possible after the IC is enabled. As mentioned above, the MICRF002 boosts the push-pull current by a factor of 45 immediately after start-up. This fixed time period is based on the reference oscillator frequency fT. The time is 10.9ms for fT = 6.00MHz, and varies inversely with fT. The value of CAGC capacitor and the duration of the shutdown time period should be selected such that the droop can be replenished within this 10ms period. Polarity of the droop is unknown, meaning the AGC voltage could droop up or down. Worst-case from a recovery standpoint is downward droop, since the AGC pull-up current is 1/10th magnitude of the pulldown current. The downward droop is replenished according to the Equation 7: (7)
A standard 20% X7R ceramic capacitor is generally sufficient. Refer to Application Hint 42 for CTH and CAGC selection examples.
V I = t C AGC
Step 4: Selecting The CAGC Capacitor
The signal path has AGC (automatic gain control) to increase input dynamic range. The attack time constant of the AGC is set externally by the value of the CAGC capacitor connected to the CAGC pin of the device. To maximize system range, it is important to keep the AGC control voltage ripple low, preferably under 10mVpp once the control voltage has attained its quiescent value. For this reason capacitor values of at least 0.47F are recommended. The AGC control voltage is carefully managed on-chip to allow duty-cycle operation of the MICRF002. When the device is placed into shutdown mode (SHUT pin pulled high), the AGC capacitor floats to retain the voltage. When operation is resumed, only the voltage droop due to capacitor leakage must be replenished. A relatively low-leakage capacitor is recommended when the devices are used in dutycycled operation. To further enhance duty-cycled operation, the AGC push and pull currents are boosted for approximately 10ms immediately after the device is taken out of shutdown. This compensates for AGC capacitor voltage droop and reduces the time to restore the correct AGC voltage. The current is boosted by a factor of 45.
where: I = AGC pullup current for the initial 10ms (67.5A) CAGC = AGC capacitor value t = droop recovery time V = droop voltage For example, if user desires t = 10ms and chooses a 4.7F CAGC, then the allowable droop is about 144mV. Using the same equation with 200nA worst case pin leakage and assuming 1A of capacitor leakage in the same direction, the maximum allowable t (shutdown time) is about 0.56s for droop recovery in 10ms. The ratio of decay-to-attack time-constant is fixed at 10:1 (that is, the attack time constant is 1/10th of the decay time constant). Generally the design value of 10:1 is adequate for the vast majority of applications. If adjustment is required the constant may be varied by adding a resistor in parallel with the CAGC capacitor. The value of the resistor must be determined on a case by case basis.
Step 5: Selecting The Demod Filter Bandwidth
The inputs SEL0 and SEL1 control the demodulator filter bandwidth in four binary steps (625Hz to 5000Hz in sweep, 1250Hz to 10000Hz in fixed mode), see Table 1. Bandwidth must be selected according to the application. The demodulator bandwidth should be set according to equation 8. 9 MICRF002/RF022
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MICRF002/RF022
(8) Demoulator bandwidth = 0.65 / Shortest pulse-width It should be noted that the values indicated in table 1 are nominal values. The filter bandwidth scales linearly with frequency so the exact value will depend on the operating frequency. Refer to the "Electrical Characteristics" for the exact filter bandwidthat a chosen frequency.
SEL0 1 0 1 0 SEL1 1 1 0 0 Demodulator Bandwidth Sweep Mode 5000Hz 2500Hz 1250Hz 625Hz FIXED Mode 10000Hz 5000Hz 2500Hz 1250Hz
Micrel
Table 1. Nominal Demodulator Filter Bandwidth vs. SEL0, SEL1 and Operating Mode
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Frequency (MHz) 300 305 310 315 320 325 330 335 340 345 350 355 360 365 370 375 380 385 390 395 400 405 410
LSERIES
Additional Applications Information
In addition to the basic operation of the MICRF002 the following enhancements can be made. In particilar it is strongly recommended that the antenna impedance is matched to the input of the IC. Antenna Impedance Matching As shown in table 4 the antenna pin input impedance is frequency dependant. The ANT pin can be matched to 50 Ohms with an L-type circuit. That is, a shunt inductor from the RF input to ground and another in series from the RF input to the antenna pin. Inductor values may be different from table depending on PCB material, PCB thickness, ground configuration, and how long the traces are in the layout. Values shown were characterized for a 0.031 thickness, FR4 board, solid ground plane on bottom layer, and very short traces. MuRata and Coilcraft wire wound 0603 or 0805 surface mount inductors were tested, however any wire wound inductor with high SRF (self resonance frequency) should do the job. Shutdown Function Duty-cycled operation of the MICRF002 (often referred to as polling) is achieved by turning the MICRF002 on and off via the SHUT pin. The shutdown function is controlled by a logic state applied to the SHUT pin. When VSHUT is high, the device goes into low-power standby mode. This pin is pulled high internally, it must be externally pulled low to enable the receiver.
ZIN( ) Z11 12- j166 12- j165 12 - j163 13 - j162 12 - j160 12 - j157 12 - j155 12 - j152 11 - j150 11 - j148 11 - j145 11 - j143 11 - j141 11 - j139 10 - 137 10 - j135 10 - j133 10 - j131 10 - j130 10 - j128 10 - j126 10 - j124 10 - j122 10 - j120 10 - j118 10 - j117 10 - j115 10 - j114 8 - j112
S11 0.803- j0.529 0.800- j0.530 0.796- j0.536 0.791- j0.536 0.789- j0.543 0.782- j0.550 0.778- j0.556 0.770- j0.564 0.767- j0.572 0.762- j0.578 0.753- j0.586 0.748- j0.592 0.742- j0.597 0.735- j0.603 0.732- j0.612 0.725- j0.619 0.718- j0.625 0.711- j0.631 0.707- j0.634 0.700- j0.641 0.692- j0.647 0.684- j0.653 0.675- j0.660 0.667- j0.667 0.658- j0.673 0.653- j0.677 0.643- j0.684 0.638- j0.687 0.635- j0.704
LSHUNT (nH) 15 15 15 15 15 12 12 12 15 15 12 12 10 10 12 12 10 10 10 10 10 10 10 10 10 10 10 10 8.2
LSERIES (nH) 72 72 72 72 68 68 68 68 56 56 56 56 56 56 47 47 47 47 43 43 43 39 39 39 36 36 33 33 33
415 420
LSHUNT
425 430 435 440
j25
j100
Table 4. Input Impedance Versus Frequency
0
50
-j25
-j100
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Power Supply Bypass Capacitors VDDBB and VDDRF should be connected together directly at the IC pins. Supply bypass capacitors are strongly recommended. They should be connected to VDDBB and VDDRF and should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only (that is, keep VSSBB currents from flowing through the VSSRF return path). Increasing Selectivity With an Optional BandPass Filter For applications located in high ambient noise environments, a fixed value band-pass network may be connected between the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. A minimum input configuration is included in figure 7a. it provides some filtering and necessary overload protection. Data Squelching During quiet periods (no signal) the data output (DO pin) transitions randomly with noise. Most decoders can descriminate between this random noise and actual data but for some system it does present a problem. There are three possible approaches to reducing this output noise: 1). Analog squelch to raise the demodulator threshold 2). Digital squelch to disable the output when data is not present 3). Output filter to filter the (high frequency) noise glitches on the data output pin. The simplest solution is add analog squelch by introducing a small offset, or squelch voltage, on the CTH pin so that noise does not trigger the internal comparator. Usually 20mV to 30mV is sufficient, and may be achieved by connecting a several-megohm resistor from the CTH pin to either VSS or VDD, depending on the desired offset polarity. Since the MICRF002 has receiver AGC noise at the internal comparator input is always the same, set by the AGC. The squelch offset requirement does not change as the local noise strength changes from installation to installation. Introducing squelch will reduce sensitivity and also reduce range. Only introduce an amount of offset sufficient to quiet the output. Typical squelch resistor values range from 6.8M to 10M. Wake-Up Function The WAKEB output signal can be used to reduce system power consumption by enabling the rest of a system when an RF signal is present. The WAKEB is an output logic signal which goes active low when the IC detects a constant RF carrier. The wake-up function is unavailable when the IC is in shutdown mode. To activate the Wake-Up function, a received constant RF carrier must be present for 128 counts or the internal system clock. The internal system clock is derived from the reference oscillator and is 1/256 the reference oscillator frequency. For example: fT = 6.4MHz fS = fT/256 = 25kHz PS = 1/fS = 0.04ms 128 counts x 0.04ms = 5.12ms MICRF002/RF022 12
Micrel
where: fT = reference oscillator frequency fS = system clock frequency PS = system clock period The Wake-Up counter will reset immediately after a detected RF carrier drops. The duration of the Wake-Up signal output is then determined by the required wake up time plus an additional RF carrier on time interval to create a wake up pulse output. WAKEB Output Pulse Time = TWAKE + Additional RF Carrier On Time For designers who wish to use the wakeup function while squelching the output, a positive squelching offset voltage must be used. This simply requires that the squelch resistor be connected to a voltage more positive than the quiescent voltage on the CTH pin so that the data output is low in absence of a transmission.
I/O Pin Interface Circuitry
Interface circuitry for the various I/O pins of the MICRF002 are diagrammed in Figures 1 through 6. The ESD protection diodes at all input and output pins are not shown.
CTH Pin
VDDBB
Demodulator Signal 2.85Vdc
PHI2B
PHI1B
CTH 6.9pF PHI1
VSSBB
PHI2
VSSBB
Figure 2. CTH Pin Figure 2 illustrates the CTH-pin interface circuit. The CTH pin is driven from a P-channel MOSFET source-follower with approximately 10A of bias. Transmission gates TG1 and TG2 isolate the 6.9pF capacitor. Internal control signals PHI1/PHI2 are related in a manner such that the impedance across the transmission gates looks like a "resistance" of approximately 100k. The dc potential at the CTH pin is approximately 1.6V
March 2003
MICRF002/RF022 CAGC Pin
VDDBB
Micrel REFOSC Pin
Active Bias VDDBB
1.5A Comparator
67.5A
200k REFOSC 30pF 30pF 250
30A VSSBB
CAGC
VSSBB
Timout 15A 675A
Figure 5. REFOSC Pin The REFOSC input circuit is shown in Figure 5. Input impedance is high (200k). This is a Colpitts oscillator with internal 30pF capacitors. This input is intended to work with standard ceramic resonators connected from this pin to the VSSBB pin, although a crystal may be used when greater frequency accuracy is required. The nominal dc bias voltage on this pin is 1.4V. SEL0, SEL1, SWEN, and SHUT Pins
VDDBB
VSSBB
Figure 3. CAGC Pin Figure 3 illustrates the CAGC pin interface circuit. The AGC control voltage is developed as an integrated current into a capacitor CAGC. The attack current is nominally 15A, while the decay current is a 1/10th scaling of this, nominally 1.5A, making the attack/decay time constant ratio a fixed 10:1. Signal gain of the RF/IF strip inside the IC diminishes as the voltage at CAGC decreases. Modification of the attack/decay ratio is possible by adding resistance from the CAGC pin to either VDDBB or VSSBB, as desired. Both the push and pull current sources are disabled during shutdown, which maintains the voltage across CAGC, and improves recovery time in duty-cycled applications. To further improve duty-cycle recovery, both push and pull currents are increased by 45 times for approximately 10ms after release of the SHUT pin. This allows rapid recovery of any voltage droop on CAGC while in shutdown. DO and WAKEB Pins
VDDBB 10A Comparator DO
Q1 VSSBB SHUT SEL0, SEL1, SWEN Q4 Q3 VSSBB Q2 to Internal Circuits
Figure 6a. SEL0, SEL1, SWEN
VDDBB
Q1 VSSBB SHUT
Q2 to Internal Circuits Q3 VSSBB
Figure 6b. SHUT Control input circuitry is shown in Figures 6a and 6b. The standard input is a logic inverter constructed with minimum geometry MOSFETs (Q2, Q3). P-channel MOSFET Q1 is a large channel length device which functions essentially as a "weak" pullup to VDDBB. Typical pullup current is 5A, leading to an impedance to the VDDBB supply of typically 1M.
10A VSSBB
Figure 4. DO and WAKEB Pins The output stage for DO (digital output) and WAKEB (wakeup output) is shown in Figure 4. The output is a 10A push and 10A pull switched-current stage. This output stage is capable of driving CMOS loads. An external buffer-driver is recommended for driving high-capacitance loads.
March 2003
13
MICRF002/RF022
MICRF002/RF022
Micrel
Applications Example
315MHz Receiver/Decoder Application Figure 7a illustrates a typical application for the MICRF002 UHF Receiver IC. This receiver operates continuously (not duty cycled) in sweep mode, and features 6-bit address decoding and two output code bits. Operation in this example is at 315MHz, and may be customized by selection of the appropriate frequency reference (Y1), and adjustment of the antenna length. The value of C4 would also change if the optional input filter is used. Changes from the 1kb/s data rate may require a change in the value of R1. A bill of materials accompanies the schematic.
+5V Supply Input Optional Filter 8.2pF, 16.6nH pcb foil inductor 1in of 30mil trace
0.4 monopole antenna (11.6in) C4 U1 MICRF002 SEL0 SEL0 VSSRF L1 VSSRF ANT C1 4.7F C2 2.2F RF Baseband (Analog) (Digital) Ground Ground VDDRF VDDBB CTH NC SWEN REFOSC SEL1 CAGC WAKEB SHUT DO VSSBB 4.7F 4.8970MHz Y1 6-bit address U2 HT-12D A0 A1 A2 A3 A4 A5 A6 A7 VSS VDD VT OSC1 OSC2 DIN D11 D10 D9 D8 R2 1k R1 68k Code Bit 0 Code Bit 1
Figure 7a. 315MHz, 1kbps On-Off Keyed Receiver/Decoder
Item U1 U2 CR1 D1 R1 R2 C1 C3 C2 C4 Vishay Vishay Vishay Vishay Vishay Part Number MICRF002 HT-12D CSA6.00MG SSF-LX100LID Manufacturer Micrel Holtek Murata Lumex Description UHF receiver logic decoder 6.00MHz ceramic resonator red LED 68k 1/4W 5% 1k 1/4W 5% 4.7F dipped tantalum capacitor 4.7F dipped tantalum capacitor 2.2F dipped tantalum capacitor 8.2pF COG ceramic capacitor
Figure 7b. Bill of Material
Vendor Vishay Holtek Lumex Murata
Telephone (203) 268-6261 (408) 894-9046 (800) 278-5666 (800) 241-6574
FAX -- (408) 894-0838 (847) 359-8904 (770) 436-3030
Figure 7c. Component Vendors
MICRF002/RF022
14
March 2003
MICRF002/RF022
Micrel
PCB Layout Information
The MICRF002 evaluation board was designed and characterized using two sided 0.031 inch thick FR4 material with 1 ounce copper clad. If another type of printed circuit board material were to be substituted, impedance matching and characterization data stated in this document may not be valid. The gerber files for this board can be downloaded from the Micrel website at www.micrel.com.
PCB Component Side Layout
PCB Silk Screen
PCB Solder Side Layout
C5
(Not Placed)
J2 REF.OSC. GND
MICRF002 JP1
1
SEL0 VSSRF VSSRF ANT VDDRF VDDBB CTH N/C
SWEN REFOSC SEL1 CAGC WAKEB SHUT DO VSSBB
16
JP3 Y1 6.7458MHz JP2 C4(CAGC) 4.7F
2
15
J1 RF INPUT
Z1 Z2
3
14
4
13
5 Z3 Z4 6
12
11
7
10
J5 SHUT GND DO GND J4 R2 10k
R1 Squelch Resistor
(Not Placed)
8
9
J3 +5V GND C1 4.7F C2 0.1F
C3(CTH) 0.047F
March 2003
15
MICRF002/RF022
MICRF002/RF022
Micrel
Package Information
PIN 1
0.157 (3.99) 0.150 (3.81)
DIMENSIONS: INCHES (MM)
0.020 (0.51) REF 0.050 (1.27) BSC
0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102)
45 0-8 0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79)
0.0648 (1.646) 0.0434 (1.102)
0.394 (10.00) 0.386 (9.80)
SEATING PLANE
16-Pin SOP (M)
0.026 (0.65) MAX)
PIN 1
0.157 (3.99) 0.150 (3.81)
DIMENSIONS: INCHES (MM)
0.050 (1.27) TYP
0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102) 0-8 SEATING PLANE 45 0.010 (0.25) 0.007 (0.18)
0.064 (1.63) 0.045 (1.14)
0.197 (5.0) 0.189 (4.8)
0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79)
8-Pin SOP (M)
MICREL, INC.
TEL
1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA
FAX
+ 1 (408) 944-0800
+ 1 (408) 944-0970
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2003 Micrel, Incorporated.
MICRF002/RF022
16
March 2003

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